Verification Engineer Specman Jobs

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SOC Verification engineer  

Logicbulls Consulting Private Limited - Noida, Uttar Pradesh

Simulation Tools: NCSIM/VCS/ModelSim/Questa Added Advantage: Knowledge of RTL coding styles Low power verification (UPF/CPF) would be an added plus Experience on System C would be an added plus Worked... INR Rs 5 Lakh / Yr

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from: Shine.com (+1 source) - 9 days ago

Design and Verification engineer  

Logicbulls Consulting Private Limited - Noida, Uttar Pradesh

SkillSet: OVM, SATA, VMM, RTL, MIPI. Worked on SoC level testbench and verification environment Testbench architecture, coding and good understanding of design issues in RTL Testbench generation, testvector... INR Rs 6 Lakh / Yr

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from: Shine.com - 9 days ago

Lead Verification Engineer  

Cerium Systems Pvt Ltd - Bangalore

Design and develop test benches using HVLs like System Verilog Specman etcDeep expertise in Verification Methodologies like OVM UVM VMMShould have experience in creating verification environment and test...

from: resumeon.com - 13 days ago

ASIC Verification engineer  

Logicbulls Consulting Private Limited - Bangalore, Karnataka

SkillSet: UVM, System Verilog, Languages, Perl, . 3+ Years of Experience in System Verilog and UVM including experience with constrained-random, coverage driven verification environments Experience developing... INR Rs 7 Lakh / Yr

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from: Shine.com (+1 source) - 25 days ago

Lead engineer  

Logicbulls Consulting Private Limited - Noida, Uttar Pradesh

Area of work: Job will require IP/VIP/SOC verification Simulation Tools: NCSIM/VCS/ModelSim/Questa Added Advantage: Knowledge of RTL coding styles Low power verification (UPF/CPF) would be an added plus... INR Rs 9 Lakh / Yr

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from: Shine.com (+1 source) - 9 days ago

SOC/IP Verification Engineer - C++ (3-8 yrs) Bangalore  

Career Makers - Bangalore

Role: The Design Verification Engineer at Company Semiconductor DS India Labs will be responsible for pre-silicon verification of a high-end mobile SOC. - Experience using Perl or other UNIX scripting...

from: hirist.com - 6 days ago

Senior Engineer  

spiderfocus solutions. - Bangalore, Karnataka (+1 location)

Architecture definition testbench architecture supporting multi language, multi tools and multi methodologies. HDL Coding Verilog. HVL Coding System Verilog. Minimum 2-3 years of experience in development... INR Rs 5 Lakh / Yr

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from: Shine.com - 23 days ago

LEAD Engineer chip Design Verification IC Design  

Sasken Communication Technologies Ltd - Bangalore

LEAD ENGINEER CHIP DESIGN VERIFICATION IC DESIGNSpecman eRM System Verilog UVM based verification at IP and SoC levelExpertise is a mustSpecman eRM SystemVerilog Verification at IP and SoC levelJD1 Verification...

from: resumeon.com - 13 days ago

Lead Engineer Chip Design Advanced Verification IC Des  

Sasken Communication Technologies Ltd - Bangalore

Hands on individualwith few team membersGood verification at SoC and IP and able to independently develop env test cases and verify also in charge for the juniors deliverablesCompetenciesShould have worked...

from: resumeon.com - 13 days ago

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VERIFICATION ENGINEER - SPECMAN  

SmartPlay Technologies - Bangalore

Education: B.Tech/B.E. - Any Specialization, Electronics/Telecommunication, Electrical) OR (PG - M.Tech/M.E - Any Specialization, Electrical, Electronics/Telecommunication) Code coverage, Functional coverage...

from: careesma.in - More than 30 days ago


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