Axis Jobs in Bidadi

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Design Engineer  

HTD Resources - Bengaluru, Karnataka, India

. ·Experience in Synthesis / Understanding of timing concepts is a plus. ·Good to have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture

from: linkedin.com - 4 days ago

Senior Design Verification Engineer  

Tech Mahindra - Bengaluru, Karnataka, India

components etc. Experience in one or more of the IPs like LPDDR-4&above, PCIE-Gen3&above, SATA, USB 3.0&above, Ethernet, DDR, NVMe, SDMM, MIPI etc. Experience with on-chip protocols like AXI/AXI-Lite, AMBA/AHB

from: linkedin.com - 6 days ago

Senior FPGA/Emulation Validation Engineer - C++ Programming  

MY Search - Bangalore, India

, DDR,USB, AXI, PCI, PCIe, GBE, MIPI...- Education: BTech/ BE ( EC,EEE,CS ) MTech - VLSI- Budget: Open for right candidate (ref:hirist.tech) 60

from: hirist.com - Yesterday

DDR solutions applications engineer  

Synopsys Inc - Bengaluru, Karnataka, India

with internal teams to improve user experience. Requirements · Prior experience in any high speed protocol such as DDR, PCIe, Ethernet · Experience in AMBA bus interfaces, AXI · Knowledge of floor-planning, SI/PI

from: linkedin.com - 6 days ago

Verification Manager  

Wipro - Bengaluru, Karnataka, India

layer, routing, reset flows etc Good experience with AXI protocol, NOC subsystem verification Good SV-UVM knowledge with hands-on experience in testbench development Good debugging skills Knowledge

from: linkedin.com - 8 days ago

Digital Design Engineer  

Bengaluru, Karnataka, India

interpersonal, teamwork and communication skills to logically & effectively drive discussions with teams spread geographically Understanding of standard on-chip interfaces such as APB/AHB/AXI/ Stream protocols

from: jobleads.co.in (+1 source) - 5 days ago

PCIe Design Verification Lead  

Wipro - Bengaluru, Karnataka, India

hands-on experience in verifying PCIe protocol (Gen4/Gen5/Gen6). Good knowledge on PCIe transaction layer, routing, reset flows etc. Good experience with AXI protocol, NOC subsystem verification. Good SV

from: linkedin.com - 8 days ago

Senior Design Verification Lead  

Wipro - Bengaluru, Karnataka, India

, Ethernet) Good knowledge on PCIe transaction layer, routing, reset flows etc. Good experience with AXI protocol, NOC subsystem verification. Good SV-UVM knowledge with hands-on experience in testbench

from: linkedin.com - 8 days ago

RTL ASIC Design Engineer  

SA Technologies - Bangalore North, India

and CDC are a must. Experience in Synthesis / Understanding of timing concepts is a plus. Good to have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture. Skills : ASIC, RTL , CDC

from: zoho.eu (+1 source) - 8 days ago

FPGA Engineer  

Wafer Space - An ACL Digital Company - Bengaluru, Karnataka, India

&R, timing closure · Knowledge of AMBA AHB/AXI/APB bus protocols. · Working knowledge of Assembly, C, and C++ languages and use in embedded systems. · Ability to test and qualify FPGA images before

from: linkedin.com - 9 days ago


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