Latest Asic Design jobs in Chennai - JobisJob India Mobile

8 Asic Design Jobs in Chennai

Senior ASIC Design Engineer Chennai, Tamil Nadu, India Responsibilities MaxLinear is seeking a Senior ASIC Design Engineer to join our SoC Digital Design group. The SoC Digital Design group architects and implements cutting-edge SoCs for communications 8 days ago
DFT Engineer Alois Staffing - Bangalore/Cochin/Kochi/Noida/Chennai, India We are currently hiring a highly skilled Design for Testability (DFT) Engineer to join our team and lead the DFT efforts for our most critical ASIC and SoC projects. As a senior-level position 43 12 days ago
Senior Staff Engineer, and Digital Verification Manager Murata America - Chennai, Tami, IN which may include embedded processors Knowledge of Mixed-Signal design and behavioral modeling of analog/mixed-signal/RF blocks Use of FPGA to validate digital RTL and gates is a plus Design verification More than 30 days ago
Asic Design And Verification Engineer Kiash Solution Llp - Chennai, Ahmedabad, Bangalore Rural Experience working of SV and UVM methodology Experience on at least one industry standard protocols like Ethernet, PCIe, MIPI, USB or similar is required 30-45 Lacs PA INR 8 days ago
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Principal Engineer - Digital Design Microchip Technology - Chennai Bachelors or Master s degree in Electrical Engineering,Computer Engineering,or related field Preferred candidate profile Extensive experience (8+ years) in digital ASIC design,with a focus on SOC Not disclosed INR 4 days ago
RTL Design Lead YO HR Consultancy - Chennai, India Location: Bangalore, Hyderabad, Chennai, Ahmadabad, Pune. Experience: 10-15 Years Must Haves 10-15 years of proven experience in ASIC design and SoC integration. Knowledge in linting and CDC analysis Not Mentioned 8 days ago
RTL Design - Lead Engineer Qualcomm Technologies, Inc - Chennai, India design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad Not Mentioned 26 days ago
RTL Design - Lead Engineer Qualcomm - Chennai, India / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience creating pad ring and working with the chip level floorplan team Not Mentioned 30 days ago

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