19 Vhdl Jobs in Gurgaon
No results for Vhdl in Gurgaon today
We have extended the distance area to search the jobs you are looking for.
-
FPGA Design Prototyping Lead Mirafra Technologies - Noida, Uttar Pradesh, India with Verilog/System Verilog/VHDL and working knowledge of C/C++- Experience in using validation environment test equipment e.g. Logic Analyzers, Oscilloscope, Protocol Analyzers, etc. is required - Experience More than 30 days ago
-
Lead Member Technical Staff Siemens - Noida,Other Uttar Pradesh project completion. Desirable Skills: Experience in RTL synthesis tool development will be a plus Proficient in SystemVerilog and VHDL, with expertise in UPF (Unified Power Format), DFT (Design 14 days ago
-
IP Standard Cell Team Front-End Characterization Engineer Qualcomm Technologies, Inc - Noida (Verilog and VHDL at cell level) is required. APL model generation for RH IR drop analysis is required. AOCV/LVF working experience/understanding is required Hands-on experience characterizing physical IPs Not disclosed INR 24 days ago
-
ASIC Digital Design, Staff Engineer Noida, Pune and implement phases of state-of-the-art products. Key responsibilities: Identify verification environment requirements from its various sources (Specifications, Design functionality, Interfaces, etc …) Generate Not Mentioned 6 days ago
- Forum: Start a Discussion Join
-
MSIP - Digital Design And Verification Engineer Noida, India of Analog Mixed signal IP along with functional requirements Experience and extensive hands on knowledge of HVLs (UVM/SV/C++/SC/e/VERA), HDLs (Verilog/VHDL),PLI/DPI, simulators (NCSim/VCS/ModelSim) Exposure Not Mentioned 4 days ago
-
Applications Engineering, Sr Manager Noida, India skills. It gives exposure to the breadth of HDL/HVL, methodologies, static and formal verification, dynamic simulation aspects including debug. As well as opportunity to experience working in a diverse Not Mentioned More than 30 days ago
-
ASIC Digital Design, Staff Engineer Noida, India Verilog and VHDL . Experience with FPGA development tools such as XILINX Vivado, and Altera Quartus. Synopsys Synplify or Protocompiler is a plus . Experience in digital design methods such as floorplanning Not Mentioned 6 days ago
-
Senior Lead Engineer FPGA Noida, India code development to address functional and performance requirements of the IP/Subsystem. Experience with Verilog/System Verilog/VHDL and working knowledge of C/C++ Working knowledge of Palladium & FPGA Not Mentioned 7 days ago
-
FPGA Engineer Noida, India understanding of Virtex-7, Virtex Ultrascale and Virtex Ultrascale+ Architectures Proficiency with Verilog/System Verilog/VHDL and working knowledge of C/C++ Experience in using validation environment test Not Mentioned More than 30 days ago
-
RTL Design engineer Noida, India and debugging in scripting language. Thorough knowledge of design aspects and SoC integration flows or similar task. Good Knowledge of Verilog, System Verilog & VHDL. Knowledge of design hierarchy modification Not Mentioned 4 days ago
Top locations