7 Mixed Signal Verification Jobs in Hyderabad District
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Engineer I- IC Design/Senior Engineer IC-Design Silicon Labs - Hyderabad, Telangana, India circuits. Verification of analog and mixed-signal sub-systems and the entire design using transistor-level and behavioral models. Report on design results through design reviews and other detailed design 8 days ago
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Staff Engineer - RTL Design (10+yrs) Silicon Labs - Hyderabad, Telangana, India the integration of digital and mixed-signal IP, verification, and quality checks. Complete the full product lifecycle from concept through development to silicon bring-up and production. Skills you’ll need 9 days ago
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Sr. Manager Silicon Design Engineering Hyderabad, Telangana, India /Digital co-verification experience a plus including Industry verification experience with Mixed-Signal blocks and SOCs. Expertise building/using Mixed-Signal testbenches, checkers and tests using System Yesterday
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AMS Verification Lead Cyient - Hyderabad, Telangana, India in Analog Mixed Signal Verification Very Good experience in Verilog AMS, Verilog-A, WREAL, modeling of Analog blocks Very Good experience in Analog Mixed Signal verification simulation tools Good experience 22 days ago
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Verification Engineer Silicon Labs - Hyderabad, Telangana, India and flows Analytical debugging skills Verify and debug low-power design Debug SDF Back Annotated Gate Simulations Low-power implementation (UPF) Mixed Signal Real Number Modeling (RNM, Spice) Preferred More than 30 days ago
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Cloudverks - Design Verification Engineer - UVM/ASIC TECHCLOUDVERKS IT SOLUTIONS PRIVATE LIMITED - Hyderabad/Telangana, India of a state-of-the-art mixed signal Sensor ASIC- Partner with team members, designers and architects to understand and verify the functionality within the context of the block, chip and overall system- Document 23 12 days ago
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Cloudverks - Design Verification Engineer - UVM/ASIC TECHCLOUDVERKS IT SOLUTIONS PRIVATE LIMITED - Hyderabad, Telangana, IN verification of a state-of-the-art mixed signal Sensor ASIC - Partner with team members, designers and architects to understand and verify the functionality within the context of the block, chip and overall 25 days ago
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