6 Signal Integrity Jobs in Kochi
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Full Chip STA Lead Zealogics Inc - India, Cochin / Kochi / Ernakulam analysis, clock domain crossing (CDC) analysis, and signal integrity (SI) analysis STA Methodology: Develop and implement STA methodologies and best practices to ensure accurate and efficient timing analysis Not Mentioned 14 days ago
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Physical Design Engineer Zealogics.com - India, Cochin / Kochi / Ernakulam signal integrity. Clock Tree Synthesis (CTS): Design and optimize clock distribution networks to achieve low skew, high frequency, and low power consumption. Power Distribution Network (PDN): Design Not Mentioned More than 30 days ago
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Physical Design Engineer Zealogics.com - India, Cochin / Kochi / Ernakulam of IC design principles, including clock domain crossing (CDC), signal integrity (SI), and power integrity (PI) considerations. Teamwork: Ability to work collaboratively in a cross-functional team Not Mentioned More than 30 days ago
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Physical Design Engineer (4 to 8 years) Zealogics Inc - India, Cochin / Kochi / Ernakulam signal integrity Clock Tree Synthesis (CTS): Design and optimize clock distribution networks to achieve low skew, high frequency, and low power consumption Power Distribution Network (PDN): Design Not Mentioned More than 30 days ago
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Physical Design Engineer (9 to 15 years) Zealogics Inc - India, Cochin / Kochi / Ernakulam considering power grid, signal integrity, area constraints, and partitioning for optimal placement of IP blocks and sub-systems Placement and Routing: Perform top-level and block-level placement to achieve Not Mentioned More than 30 days ago
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Physical Design Engineer Zealogics.com - India, Cochin / Kochi / Ernakulam considering power grid, signal integrity, area constraints, and partitioning for optimal placement of IP blocks and sub-systems. Placement and Routing: Perform top-level and block-level placement to achieve Not Mentioned More than 30 days ago
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