23 Fpga Design Jobs in State of Maharashtra
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ASIC Front-End Design Engineer Hyperhire - Maharashtra, India departments For Senior Engineer Role: Experience Requirements- - Front-End Design Experience - RTL Design, Verdi, VCS, Verilog - FPGA Synthesis & Debugging Preferences- - STA(PrimeTime), HPC Design, AI Chip 3 days ago
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Senior Engineer_FPGA eInfochips (An Arrow Company) - Pune, Maharashtra, India Job Title: Senior Engineer - FPGA Location: Pune Experience level: 6+ Years In depth knowledge with VHDL/Verilog/System Verilog, RTL design, FPGA design, and FPGA design tools. Complete FPGA More than 30 days ago
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Principal Digital Electronics Engineer Pune, Maharashtra, India as part of drilling, wireline, perforating technologies Design and analysis of data acquisition systems including A/D, D/A, high speed Microcontrollers, Digital Signal Processors (DSP), FPGA, I/O 2 days ago
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Mixed Signal ASIC Design VASBEAM Pvt Ltd - Pune, Maharashtra, India and behavioural modeling using MATLAB, System Verilog, Verilog-A/AMS. Experience with HDL languages Verilog and/or VHDL is desired. Scripting skills: Python, Perl and C is a plus. · Experience with design More than 30 days ago
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Hardware Engineer - FPGA Infovision HR Consulting Services Pvt Ltd. - Pune, India Job Description :- Degree in Industrial Electronics/Electronics & Telecommunication with 8+ years industrial working experience.- Knowledge of microprocessor, FPGA and memory circuits, power supply 25 3 days ago
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Senior FPGA Design Engineer Pune, Maharashtra, India business environment. We are here for effective client servicing, taking care of our employees’ needs, and creating a success story to remember. Job Summary: TWe are seeking a highly skilled FPGA Design More than 30 days ago
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Sr. Engineer - Embedded Systems Hardware Pune, Maharashtra, India of microprocessor, FPGA and memory circuits, power supply design. Experience on working with Analog, Mixed Signal, High Speed designs is a must. Knowledge of circuit simulation, signal integrity, EMI/EMC standards 17 days ago
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Mixed Signal ASIC Design Lead - System Verilog ACZ Global Private Limited - Pune, India Verilog and/or VHDL is desired.- Scripting skills like Python, Perl and C is a plus.- Experience with design, implementation, and development environments for reconfigurable systems (such as FPGAs 40 More than 30 days ago
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Sr Staff Design Engineer Maharashtra, India complications of highly programmable FPGA fabrics. This role carries the need to be both a strong educator and a open-minded student. Accountabilities: Serve as a key contributor to FPGA design efforts. Drive 2 days ago
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Hardware Lead Engineer Maharashtra, India Candidate Skill: Hardware Design | PCB Layout | Analog & Digital Circuit Design | FPGA | Microcontroller Systems | Regulatory Compliance | Altium Designer | Cadence Allegro Experience: 10+ years City 7 days ago
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