Asic Design Jobs in New Delhi

Synopsys Inc - Noida, Uttar Pradesh, India

of design concepts, ASIC flows and stakeholders. Good communication skills. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color

from: linkedin.com - More than 30 days ago

Strategic HR Solutions - Noida, India

Job Description :- In-depth knowledge and hands-on experience on Analog Full chip - Schematic to Implementation i.e. Floorplanning, Power Grid Design, Placement, Routing, Physical Verification.- Must have... 55

from: hirist.com (+1 source) - 21 days ago

METACIPHER LABS PRIVATE LIMITED - Noida, Ghaziabad, IN

Job Description : - ASIC Physical Design Engineer with 7 years of Experience in Physical Design -Placement and Routing, Floor Planning, Static Timing Analysis & Physical Verification. - Experience

from: adzuna.in - 16 days ago

Synopsys - Bengaluru, Noida

So,the corresponding mindset is a must. - It is essential that the individual has good written and oral communication skills and can demonstrate good analysis,debug and problem-solving skills and show... Not disclosed INR

from: naukri.com - 11 days ago

Synopsys - Bengaluru, Noida

In addition,the candidate should have excellent oratory and written communication skills in English,should be a team player and possess good problem solving skills and show high levels of initiative Not disclosed INR

from: naukri.com - 11 days ago

Delhi, Noida

. Our client's cutting edge solutions include : - ASIC Design - Verification - Physical Design - DFT - Circuit Design & Layout - FPGA Design and Emulation They are looking for Analog Layout Design Lead to be based Not Mentioned

from: Monsterindia.com - More than 30 days ago

Synopsys - Bengaluru, Noida

Hands on experience with creating micro-architecture/ detailed design from Functional Specifications for small/ medium design complexity Not disclosed INR

from: naukri.com - 11 days ago

Synopsys - Bengaluru, Noida

The job requirement includes the evaluation of PPA targets (Area / Speed/Power) and co-work with design team to improve the design & constraints. Not disclosed INR

from: naukri.com - 11 days ago

Delhi, India (+1 location)

design considerations. Basic understanding of ASIC physical design flow: LEF generation, Place & Route & understanding of top level verification flow, DRC/LVS, LPE. Scripting skills for layout automation Not Mentioned

from: Monsterindia.com - 2 days ago

People Impact - Hybrid - Bengaluru, Hyderabad, Noida

candidate will have 5-10 years of proven industry experience in DFT methodologies and techniques - 5-10 years of hands-on experience in DFT for ASIC and / or FPGA designs 15-30 Lacs PA INR

from: naukri.com - 4 days ago