20 Vhdl Jobs in Uttar Pradesh
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FPGA Design Prototyping Lead Mirafra Technologies - Noida, Uttar Pradesh, India with Verilog/System Verilog/VHDL and working knowledge of C/C++- Experience in using validation environment test equipment e.g. Logic Analyzers, Oscilloscope, Protocol Analyzers, etc. is required - Experience More than 30 days ago
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Senior Lead Engineer FPGA Dadri, Uttar Pradesh, India functional and performance requirements of the IP/Subsystem. Experience with Verilog/System Verilog/VHDL and working knowledge of C/C++ Working knowledge of Palladium & FPGA platform Expertise in using More than 30 days ago
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Senior Software Engineer Dadri, Uttar Pradesh, India methodologies. Fair understanding in one of the HDL (Verilog, System Verilog, VHDL or SystemC) Basics of Compiler Transformation and Optimizations B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college More than 30 days ago
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Lead Member Technical Staff Siemens - Noida,Other Uttar Pradesh project completion. Desirable Skills: Experience in RTL synthesis tool development will be a plus Proficient in SystemVerilog and VHDL, with expertise in UPF (Unified Power Format), DFT (Design 20 days ago
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ASIC Digital Design, Staff Engineer Noida, India will be involved at specify, verification and implement phases of state-of-the-art products. Key responsibilities: Identify verification environment requirements from its various sources (Specifications, Design Not Mentioned 12 days ago
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MSIP - Digital Design And Verification Engineer Noida, India of Analog Mixed signal IP along with functional requirements Experience and extensive hands on knowledge of HVLs (UVM/SV/C++/SC/e/VERA), HDLs (Verilog/VHDL),PLI/DPI, simulators (NCSim/VCS/ModelSim) Exposure Not Mentioned 10 days ago
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ASIC Digital Design, Staff Engineer Noida, India Verilog and VHDL . Experience with FPGA development tools such as XILINX Vivado, and Altera Quartus. Synopsys Synplify or Protocompiler is a plus . Experience in digital design methods such as floorplanning Not Mentioned 12 days ago
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RTL Design engineer Noida, India and debugging in scripting language. Thorough knowledge of design aspects and SoC integration flows or similar task. Good Knowledge of Verilog, System Verilog & VHDL. Knowledge of design hierarchy modification Not Mentioned 10 days ago
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Senior Lead Engineer FPGA Noida, India code development to address functional and performance requirements of the IP/Subsystem. Experience with Verilog/System Verilog/VHDL and working knowledge of C/C++ Working knowledge of Palladium & FPGA Not Mentioned 13 days ago
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FPGA Engineer Noida, India understanding of Virtex-7, Virtex Ultrascale and Virtex Ultrascale+ Architectures Proficiency with Verilog/System Verilog/VHDL and working knowledge of C/C++ Experience in using validation environment test Not Mentioned More than 30 days ago
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